    M1 (Out B Vdd Vdd) PMOS_VTL w=pf l=50n as=1.89e-14 ad=1.89e-14 \
        ps=390.0n pd=390.0n ld=105n ls=105n m=1
    M0 (Out A Vdd Vdd) PMOS_VTL w=pf l=50n as=1.89e-14 ad=1.89e-14 \
        ps=390.0n pd=390.0n ld=105n ls=105n m=1
    M3 (net14 B Vss Vss) NMOS_VTL w=nf l=50n as=9.45e-15 ad=9.45e-15 \
        ps=300n pd=300n ld=105n ls=105n m=1
    M2 (Out A net14 Vss) NMOS_VTL w=nf l=50n as=9.45e-15 ad=9.45e-15 \
        ps=300n pd=300n ld=105n ls=105n m=1
ends CmosNand
// End of subcircuit definition.
